1. Field of the Invention
The present invention relates to the integration of low-K SiOF as an inter-layer dielectric (ILD) for a damascene structure. In particular, the present invention relates to integrating fluorosilicate glass (FSG) or SiOF as an inter-layer dielectric for a damascene structure, to thereby obtain the benefit of a low dielectric constant (low-k) to improve device performance.
2. Description of the Related Art
Fluorinated SiO2, typically provided by way of plasma enhanced chemical vapor deposition (PECVD) or by way of high density plasma (HDP), can be used to lower the dielectric constant of SiO2 from, for example, 4.0 to 3.5-3.8. The lowering of the dielectric constant is advantageous for a number of reasons, including the reduction of the capacitance of a semiconductor device, which results in an improved performance of the semiconductor device.
However, fluorine in SiO2 will react with physical vapor deposition (PVD) barrier metals, such as Ti, TiN, Ta, TaN, etc., which are subsequently deposited on the surface of the fluorinated SiO2. This reaction between fluorine and the barrier metals will cause delamination on flat SiOF surfaces, as well as inside via holes. Both of these occurrences are disadvantageous.
It is an object of the present invention to provide fluorosilicate glass (FSG) as an intermetal dielectric for a damascene structure, whereby the possibility of fluorine leakage to neighboring layers is lessened.
It is another object of the present invention to provide FSG as an inter-metal dielectric layer for a damascene structure using in-situ deposition.
The above-mentioned objects and other advantages of the present invention may be achieved by a method of forming an interlayer dielectric on a substrate. The method includes a step of forming a first etch stop layer on the substrate. The method also includes a step of forming a first interlayer dielectric layer on the first etch stop layer by deposition using one of a plasma-enhanced chemical vapor deposition and a high deposition pressure chemical vapor deposition, where the first interlayer dielectric layer contains fluorine. The method further includes a step of forming a second etch stop layer on the first interlayer dielectric layer. The method still further includes a step of forming a second interlayer dielectric layer on the second etch stop layer by deposition using one of a plasma-enhanced chemical vapor deposition and a high deposition pressure chemical vapor deposition, where the second interlayer dielectric layer contains fluorine. The method also includes a step of etching the first and second interlayer dielectric layers and the first and second etch stop layers to form at least one trench and at least one via. The method further includes a step of treating the at least one trench and the at least one via with an H2/N2 plasma in-situ, wherein a fluorine-depleted region in the first and second interlayer dielectric layers is formed, and wherein a nitrided region is formed adjacent the fluorine-depleted region, with the nitrided region corresponding to a side surface of the at least one trench and the at least one via. The method still further includes a step of depositing a barrier metal layer in the at least one trench and the at least one via, whereby the nitrided region provides a passivation layer by which fluorine in the fluorine-depleted region is kept from leeching into the barrier metal layer. The step also includes a step of filling the at least one trench and the at least one via with one of copper and aluminum.
The above-mentioned objects and other advantages may also be achieved by a semiconductor device having a damascene structure and being formed on a substrate. The semiconductor devices includes a first etch stop layer formed on the substrate. The device also includes a first fluorosilicate glass layer formed on the first etch stop layer, the first fluosilicate glass layer including at least one via. The device further includes a second etch stop layer formed on the first fluosilicate glass layer. The device still further includes a second fluorosilicate glass layer formed on the second etch stop layer, the second fluosilicate glass layer including at least one via that provides a conductive path to the substrate and to the at least one trench. Sidewalls of the at least one trench and the at least one via include a barrier metal layer that forms an outer surface of the sidewalls, a nitrided region formed adjacent to the barrier metal layer, and a nitrided region formed adjacent to the nitrided region, with the nitrided region being disposed between the fluorine-depleted region and the barrier metal layer to thereby provide a barrier for preventing fluorine atoms in the fluorine-depleted region from moving into the barrier metal layer.